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HD155121F
RF Transceiver IC for GSM and PCN Dual band cellular systems
ADE-207-265A (Z) 2nd Edition May 1999 Description
The HD155121F is a RF transceiver IC for GSM and PCN dual band cellular systems, and integrates most of the low power silicon functions of a transceiver. The HD155121F incorporates two bias circuits for RF LNAs, two first mixers, a second mixer, a programmable gain amplifier, and an IQ demodulator for the receiver, and an IQ modulator and offset PLL for the transmitter. Also, on chip are dividers for the phase splitter. Moreover the HD155121F includes control circuits to implement power saving modes. These functions can operate down to 2.7 V and are housed in a 48-pin LQFP SMD package. Hence the HD155121F can form a small size transceiver handset for dual band by adding a dual PLL frequency synthesizer IC, power amplifiers and some external components. The HD155121F is fabricated using a 0.6 m double-polysilicon Bi-CMOS process.
Functions
Receiver(Rx) * * * * * Low Noise Amplifier (LNA) bias circuit First mixer IF amplifier and second mixer Programmable Gain Amplifier (PGA) IQ demodulator with 90 degree phase splitter
Transmitter(Tx) * IQ modulator with 90 degree phase splitter * Offset PLL Down converter Phase comparator TXVCO driver Others * IF dividers * Power saving control circuit * IFVCO
HD155121F
Features
* Highly integrated RF processing for hand-portables * Operating supply voltage VCC : 2.7 to 3.6 V Phase comparator and TXVCO driver circuit : 2.7 to 5.25 V * Current consumption Rx mode (GSM) : 53 mA + LNA current Rx mode (PCN) : 52 mA + LNA current Tx mode (GSM) : 36 mA Tx mode (PCN) : 37 mA Idle mode :1 A * Operating temperature : -20 to +75 degree * LQFP 48pin SMD (Low Profile Quad Flat Package) * Wide operating frequencies Rx RF GSM : 925 - 960 MHz PCN : 1805 - 1880 MHz 1st IF : 225 MHz 2nd IF : 45 MHz Tx RF GSM : 880 - 915 MHz PCN : 1710 - 1785 MHz IF GSM : 270 MHz PCN : 135 MHz * Offset PLL architecture for Transmitter * High dynamic range Programmable Gain Amplifier (PGA)
2
HD155121F
Pin Arrangement
MIX1OUTB POONRX2 POONRX1 MIX1INB2 GNDMIX1 VCCMIX1 MIX1OUT POONTX
MIX1IN2
48 MIX1INB1 MIX1IN1 RFOUT RFIN1 RFIN2 VCCPLL GNDPLL VCOIN2 VCOIN1 VCCCOMP PLLOUT ICURAD 1 2 3 4 5 6 7 8 9 10 11 12 13 QINB
47
46
45
44
43
42
41
40
39
38
37 36 35 34 33 32 31 30 29 28 27 26
GNDDIV
VCCDIV
RFLOIN
IFLO BAND IFVCOO IFVCOI VCCIF GNDIF IFIN IFINB LE SDATA CLK MIX2O
14 QIN
15 IINB
16 IIN
17 MODLB
18 VCCIQ
19 GNDIQ
20 QOUTB
21 QOUT
22 IOUTB
23 IOUT
25 24 MIX2OB
(Top View)
3
HD155121F
Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Pin Name MIX1INB1 MIX1IN1 RFOUT RFIN1 RFIN2 VCCPLL GNDPLL VCOIN2 VCOIN1 VCCCOMP PLLOUT ICURAD QINB QIN IINB IIN MODLB VCCIQ GNDIQ QOUTB QOUT IOUTB IOUT MIX2OB MIX2O CLK SDATA LE IFINB IFIN GNDIF VCCIF IFVCOI IFVCOO Description Negative input for Mixer1 (GSM) Positive input for Mixer1 (GSM) Bias for the collector of LNA transistor Bias for the base of LNA transistor (GSM) Bias for the base of LNA transistor (PCN) VCC for OPLL GND for OPLL TxVCO signal input (PCN) TxVCO signal input (GSM) VCC for phase comparator Current output to control and modulate the TxVCO Phase comparator output current setting Negative input of Q signal for modulator Positive input of Q signal for modulator Negative input of I signal for modulator Positive input of I signal for modulator VCC for modulator load bias VCC for IQ modulator and demodulator GND for IQ modulator and demodulator Negative output of Q signal for modulator Positive output of Q signal for modulator Negative output of I signal for modulator Positive output of I signal for modulator Negative output for Mixer2 Positive output for Mixer2 Clock for serial data Serial data for Gain control Load enable for serial data Negative input for Mixer2 Positive input for Mixer2 GND for Mixer2 and PGA VCC for Mixer2 and PGA Base of IFVCO transistor Emitter of IFVCO transistor
4
HD155121F
Pin Description (cont)
Pin No. 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name BAND IFLO GNDDIV VCCDIV RFLOIN GNDMIX1 VCCMIX1 MIX1OUT MIX1OUTB POONRX1 POONRX2 POONTX MIX1INB2 MIX1IN2 Description Band control (Low: GSM, High: PCN) Output of IFVCO or Input of IF Local GND for Divider and IFVCO VCC for Divider and IFVCO Input for RF Local GND for Mixer1 VCC for Mixer1 Positive output for Mixer1 (GSM/PCN) Negative output for Mixer1 (GSM/PCN) Power save control for LNA and Mixer1 Power save control for Mixer2, PGA and demodulator Power save control for modulator and OPLL Negative input for Mixer1 (PCN) Positive input for Mixer1 (PCN)
5
6
225MHz (225MHz) from System controller from VCO VCCMIX1 POONRX2 POONRX1 GNDMIX1 GNDDIV RFLOIN MIX1OUTB MIX1OUT VCCDIV 1172MHz (Rx: 1580MHz, Tx: 1575MHz) POONTX
47 46 45 44 43 42 41 40 39 38 37
HD155121F
Block Diagram
(1805MHz)
MIX1INB2
MIX1IN2
947MHz IFLO BAND IFVCOO IFVCOI
33 32
48
MIX1INB1 540 MHz
35 34 36
1
MIX1IN1 Vref (Mix1) from Band SW 1/2 1/6
2
Vref (Div.Rx) (Div.Tx) Vref (IFVCO) Vref (LNA) (1580/1575MHz) 1172MHz 1/2 (90deg) 1/2 (90deg) 45MHz (45MHz) Vref (IF) Serial interface Vref (PGA) 45MHz (45MHz)
from System controller
RFOUT
3
947MHz
Tune
RFIN1
4
LNA Bias circuit
from Antenna 1172MHz (1580/ 1575MHz) GSM: 270MHz PCN: 135MHz 270MHz (135MHz) Vref (Mod) Vref (Demod)
14 15 16 17 18 19 20 21 22 23 24
RFIN2
5
VCCIF
31 30 29 28 27 26 25
(1805MHz)
VCCPLL
6
Vref (PLL)
GNDIF IFIN IFINB LE SDATA CLK MIX2O 225MHz (225MHz)
GNDPLL
7
(1710MHz)
VCOIN2
8
902MHz
VCOIN1
9
Tx.VCO2 Tx.VCO1
VCCCOMP
270MHz (135MHz)
10
from System controller
PLLOUT
11
Current mode driver
ICURAD
12
RICURAD IIN IINB IOUT QOUT MODB IOUTB VCCIQ GNDIQ QOUTB MIX2OB
13
QIN
QINB
45MHz to Base band
from Base band
Configuration
Mixer1 LNA 225 MHz Mixer2 I Q PGA I&Q Demo. IF SAW filter Mixer1 LNA
bias circuit bias circuit
925 to 960 MHz
RF SAW filter
45 MHz LC
RF filter RF SAW filter 270 MHz Serial data interface 45 MHz GSM: 1150 to 1185 MHz PCN : Rx. 1580 to 1655 MHz /Tx. 1575 to 1650 MHz IFVCO PLL2 HD155017T GSM: 540 MHz PCN: 540 MHz /2
1805 to 1880 MHz
RF filter RF VCO Dual synth. PLL1
HD155121F
/6 PCN: 270 MHz GSM: 540 MHz
90 deg Shift /2
S/W
B.B. Block
LPF
90 deg Shift /2 GSM: 270 MHz PCN: 135 MHz GSM: 270 MHz PCN: 135 MHz
LPF 880 to 915 MHz Loop filter PA Module 1710 to 1785 MHz
880 to 915 MHz Phase Detector I&Q Mod I Q
1710 to 1785 MHz
HD155121F
7
HD155121F
Functional Operation
The HD155121F has been designed from system stand point and incorporated a large number of the circuit blocks necessary in the design of a digital cellular handset. Receiver Operation The HD155121F incorporates two LNA bias circuits for external RF transistors, whose NF and power gain can be better selected. This circuit amplifies the RF signal after selection by the antenna filter before the signal enters the first mixer section. The RF signal is combined with a local oscillator (LO) signal to generate a wanted first IF signal in the 130 - 300 MHz range. The first mixer circuit uses a double-balanced Gilbert cell architecture, which has open collector differential outputs. If, at 225 MHz, a 800 LC load is connected to the mixer's outputs then a SSB NF of 9.0 dB (GSM), 9.1 dB (PCN) with a gain of 9.5 dB (GSM), 8.5 dB (PCN) is realizable. The corresponding input compression point is -10.5 dBm (GSM), -12.5 dBm (PCN), which allows the device to be used within a GSM and EGSM and PCN system. A filter is used after the first mixer to provide image rejection and the conditioned signal is then passed through an intermediate amplifier, before being down converted to a second IF in the range of 26 - 60 MHz. The second mixer can generate a 45 MHz second IF, if a 270 MHz second local signal is used. The second mixer also uses the Gilbert cell architecture, but with internal resistive differential outputs of 300 . If amplifier and second mixer has a SSB NF of 6.0 dB, a power gain of 13 dB and a input compression point of -22 dBm. In order to improve the blocking characteristics of the device an external LC resonator across the differential outputs of the second mixer is recommended. First mixer and second mixer can switch the power gain. Switching gain step of first mixer is 12 dB, and such step of second mixer is 16 dB. The signal is then passed to the PGA circuit, which has a dynamic range of more than 80 dB (-42 dB - +56 dB typ.) and is controlled by digital serial data, which is generated by the microprocessor. This gain step is 2 dB. The signal is then down converted by a demodulator to I and Q. Internal divider circuits convert the IFLO signal to the same frequency as the second IF before passing this local signal through a phase splitter / shifter in order to generate the in phase and quadrature phase IQ components. The phase accuracy of the IQ demodulator is less than +/-1 degree and the amplitude mismatch is less than +/-0.5 dB. In order to accommodate different baseband interfaces the HD155121F IQ differential outputs have a voltage swing of 1.6 Vpp and DC offset of less than +/-60 mV. Within each output stage a second order Butterworth filter (fc = 210 kHz) is used to improve the blocking performance of the device. In order to allow flexibility in circuit implementation the HD155121F can configured to use either a singleended or balanced external circuitry and components.
8
HD155121F
Transmitter Operation The transmitter chain converts differential IQ baseband signals to a suitable format for transmission by a power amplifier. The common mode voltage range of the modulator inputs is 0.8 V to 1.2 V and they have 2.0 Vpp differential swing. The modulator circuit uses double-balanced mixers for the I and Q paths. The Local signals are generated by dividing the IFLO signals by 2, and then passed to the modulator through a phase splitter / shifter. The IF signals generated are then summed to produce a single modulated IF signal which is amplified and fed into the offset PLL block. Carrier suppression due to the mixer circuit is better than 31 dBc. If the common mode DC voltage of the I and Q inputs is adjusted, carrier suppression is better than 40 dBc easily. Side band suppression is better than 35 dBc without adjustment. Within the offset PLL block there are a down converter, a phase comparator and a VCO driver. The down converter mixes the first local signal and the TXVCO signal to create a reference local signal for use in the offset PLL circuit. The phase comparator and the VCO driver generate an error current, which is proportional to the phase differential between the reference IF and the modulated IF signals. This current is used in a second order loop filter to generate a voltage, which in turn modulates the TXVCO. In order to optimize the PLL loop gain, the error current value can be modified by changing the value of an external resistor - ICURAD. In order to accommodate various control range of TXVCOs, the offset PLL circuit has been designed to operate with a supply voltage up to 5.25 V.
9
HD155121F
Operation Modes The HD155121F has necessary control circuitry to implement the necessary states within the dual band system. Also provided is a power saving mode which reduces the current consumption of the device by powering down unnecessary function blocks. Three pins are assigned for power saving mode control, POONRX1, POONRX2 and POONTX. Also one pin is assigned for switching operational band, BAND. Table 1 shows the relationship between the pins and the required operating mode. These pins are controlled by the system controller. As per GSM requirements the Tx and Rx sections do not operate simultaneously. For the receiver there is a calibration mode in which the LNA bias circuit and first mixer are switched off. During this period the gain of the PGA can be adjusted. Also the DC offsets of the IQ demodulator are measured and subsequently canceled. In order to change between the Rx and Tx modes a state called "warm-up" is used to ensure that the local signals are not unduly affected. This method of switching between Tx and Rx ensures that lock is achieved first time. Power saving is implemented through use of the idle mode. All function blocks of the HD155121F are switched off until such time as the system controller commands the device to power up again. Table 1
Mode Band POONRX1 (44) POONRX2 (45) POONTX (46) BAND (35) Rx block LNA bias (GSM) LNA bias (PCN) 1st Mixer (GSM) 1st Mixer (PCN) 2nd Mixer PGA I/Q demodulator Tx block Offset PLL I/Q modulator Oscillator block IF VCO Divider (Rx) Divider (Tx) 1st local buffer IF local buffer Total current
Operating Modes with Power Saving
Receive GSM H H L L ON OFF ON OFF ON ON ON OFF OFF ON ON OFF ON ON 53 mA PCN H H L H OFF ON OFF ON ON ON ON OFF OFF ON ON OFF ON ON 52 mA Calibrate -- L H L Don't care OFF OFF OFF OFF ON ON ON OFF OFF ON ON OFF ON ON 34 mA Warm-up -- L L L Don't care OFF OFF OFF OFF OFF OFF OFF OFF OFF ON OFF OFF ON ON 9.0 mA Transmit GSM L L H L OFF OFF OFF OFF OFF OFF OFF ON ON ON OFF ON ON ON 36 mA PCN L L H H OFF OFF OFF OFF OFF OFF OFF ON ON ON OFF ON ON ON 37 mA Idle -- H L Don't care Don't care OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF 1 A
10
HD155121F
Absolute Maximum Ratings
Any stress in excess of the absolute maximum ratings can cause permanent damage to the HD155121F.
Item Power supply voltage (VCC) Power supply voltage (VCCCOMP) Pin voltage Maximum power dissipation Operating temperature Storage temperature Symbol VCC VCCCOMP VT PT Topr Tstg Rating -0.3 to +4.0 -0.3 to +5.5 -0.3 to VCC+0.3 (4.0 Max) 400 -20 to +75 -55 to +125 Unit V V V mW C C
11
HD155121F
Electrical Characteristics
DC Specifications (VCC = 3 V, Ta = 25C unless otherwise specified.)
Item Power supply voltage (VCC) Power supply voltage (VCCCOMP) Power supply current (Rx.) GSM PCN Power supply current (Tx.) GSM PCN Power supply current (Warm-up) Power saving mode supply current Mode Min 2.7 2.7 -- -- -- -- -- -- Typ 3.0 3.0 53.0 52.0 36.0 37.0 9.0 1.0 Max 3.6 5.25 74.0 73.0 50.0 52.0 12.5 10.0 Unit V V mA mA mA mA mA A VCC = 3.0V, VCCCOMP = 3.0V VCC = 3.0V, VCCCOMP = 3.0V High level = VCC, Low level = 0V at mode control pin and serial data pin (POONRX1, RX2, TX, BAND, CLK (no clock signal), SDATA, LE) from PS mode from PS mode 2 2 VCC = 3.0V, VCCCOMP = 3.0V, Mixer1, 2 = Gain1, PGA = bitNo26 VCC = 3.0V, VCCCOMP = 3.0V 2 2 Test Condition Note
Power up time (Rx.) Power up time (Tx.) Power on control voltage range (POONRX1, POONRX2, POONTX) Power off control voltage range (POONRX1, POONRX2, POONTX) I/Q common-mode output voltage I/Q maximum output swing (Single ended) I/Q output DC offset voltage I/Q common-mode input voltage I/Q input swing (Single ended) Serial data VH (CLK, SDATA, LE) Serial data VL (CLK, SDATA, LE) Band control VH (BAND) Band control VL (BAND) Input current (POONRX1, POONRX2, POONTX, BAND, CLK, SDATA, LE)
-- -- 2.3 -- 1.15 0.8 -60 0.8 0.8 2.3 -- 2.3 -- -10
1.5 0.2 -- -- 1.35 1.06 0 1.0 1.0 -- -- -- -- 0
5.0 0.5 -- 0.8 1.55 -- 60 1.2 1.2 -- 0.8 -- 0.8 10
sec sec V V V Vp-p mV V Vp-p V V V V A
1 1
VIOUT, VIOUTB, VQOUT, VQOUTB VIOUTDC - VIOUTBDC, VQOUTDC, VQOUTBDC 1 VIIN, VIINB, VQIN, VQINB 1
Note:
1. These values are not tested in mass production. 2. Power supply current does not include the LNA bias current.
12
HD155121F
AC Specifications (VCC = 3 V, Ta = 25C unless otherwise specified.) * LNA Bias circuit specifications
Item LNA transistor bias current Mode GSM PCN Frequency GSM PCN Power gain GSM PCN Noise figure GSM PCN 3rd order input intercept point GSM PCN 3rd order output intercept point GSM PCN 1dB input compression point GSM PCN 1dB output compression point GSM PCN Output (RF) Z GSM PCN Input (RF) Z GSM PCN Note: Min 4.7 4.7 925 1805 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 19.4 13.4 1.6 1.6 -6.0 -2.0 13 11 -14.5 -9.5 3.9 2.9 50 50 50 50 Typ 5.6 5.6 -- Max -- -- 960 1880 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Unit mA mA MHz MHz dB dB dB dB dBm dBm dBm dBm dBm dBm dBm dBm Output (GSM RF) Output (PCN RF) Input (GSM RF) Input (PCN RF) 1 1 1 1 1 RF = 940 MHz RF = 1842 MHz RF = 940 MHz RF = 1842 MHz 1 1 1 1 Test Condition Note
1. These AC characteristics are shown for reference only and do not form part of the HD155121F component specification.
13
HD155121F
* Mixer1 specifications (Differential output load between pin42 and pin43 = 800 )
Item Frequency (RF) Mode GSM PCN Frequency (LO) GSM PCN Frequency (IF) RFLO input level Conversion gain 1 -- -- GSM PCN Conversion gain 2 GSM PCN Noise figure 1 GSM PCN Noise figure 2 GSM PCN 3rd order input intercept point 1 GSM PCN 3rd order input intercept point 2 GSM PCN 3rd order output intercept point 1 GSM PCN 3rd order output intercept point 2 GSM PCN 1dB input compression point 1 1dB input compression point 2 1dB output compression point 1 1dB output compression point 2 GSM PCN GSM PCN GSM PCN GSM PCN Min 925 1805 1125 1505 200 -8.0 6.5 5.5 -5.5 -6.5 -- -- -- -- -3.0 -6.0 1.0 -3.0 6.5 2.5 -1.5 -6.5 -12.5 -14.5 -8.5 -10.5 -4.0 -7.0 -12.0 -15.0 Typ -- -- -- -- 225 -- 9.5 8.5 -2.5 -3.5 9.0 9.1 15.0 16.0 -1.0 -4.0 3.0 -1.0 8.5 4.5 0.5 -4.5 -10.5 -12.5 -6.5 -8.5 -2.0 -5.0 -10.0 -13.0 Max 960 1880 1260 1680 300 -- 12.5 11.5 0.5 -0.5 10.5 10.6 16.5 17.5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Unit MHz MHz MHz MHz MHz dBm dB dB dB dB dB dB dB dB dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF1 = 940.8MHz, RF2 = 941.6MHz, LO = 1165MHz, IF = 225MHz RF1 = 1842.8MHz, RF2 = 1843.6MHz, LO = 1617MHz, IF = 225MHz RF1 = 940.8MHz, RF2 = 941.6MHz, LO = 1165MHz, IF = 225MHz RF1 = 1842.8MHz, RF2 = 1843.6MHz, LO = 1617MHz, IF = 225MHz RF1 = 940.8MHz, RF2 = 941.6MHz, LO = 1165MHz, IF = 225MHz RF1 = 1842.8MHz, RF2 = 1843.6MHz, LO = 1617MHz, IF = 225MHz RF1 = 940.8MHz, RF2 = 941.6MHz, LO = 1165MHz, IF = 225MHz RF1 = 1842.8MHz, RF2 = 1843.6MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz RF = 940MHz, LO = 1165MHz, IF = 225MHz RF = 1842MHz, LO = 1617MHz, IF = 225MHz 1, 2 1, 2 2 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 2 2 1 1 Test Condition Note 1
Note:
1. These values are not tested in mass production. 2. The loss (2.2 dB) of test circuit at Mixer1 output is calculated.
14
HD155121F
* Mixer2 specifications
Item Frequency (IF1) Frequency (LO2) Frequency (IF2) IFLO input level Conversion gain 1 Conversion gain 2 Noise figure 1 Noise figure 2 3rd order input intercept point 1 3rd order input intercept point 2 3rd order output intercept point 1 3rd order output intercept point 2 1dB input compression point 1 1dB input compression point 2 1dB output compression point 1 1dB output compression point 2 Isolation Mode Min 200 240 40 -10 10.5 -5.5 -- -- -15.0 -11.0 -2.0 -14.0 -24.0 -21.0 -12.0 -24.0 50 Typ 225 270 45 -- 13.0 -3.0 6.0 12.0 -13.0 -9.0 0.0 -12.0 -22.0 -19.0 -10.0 -22.0 -- Max 300 360 60 -- 15.5 -0.5 7.5 13.5 -- -- -- -- -- -- -- -- -- Unit MHz MHz MHz dBm dB dB dB dB dBm dBm dBm dBm dBm dBm dBm dBm dB IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225.8MHz, IF2 = 226.6MHz, LO = 540MHz, 2ndIF = 45MHz IF1 = 225.8MHz, IF2 = 226.6MHz, LO = 540MHz, 2ndIF = 45MHz IF1 = 225.8MHz, IF2 = 226.6MHz, LO = 540MHz, 2ndIF = 45MHz IF1 = 225.8MHz, IF2 = 226.6MHz, LO = 540MHz, 2ndIF = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz IF1 = 225MHz, IFLO = 540MHz, IF2 = 45MHz between Mixer1 output and Mixer2 input 2 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 2 2 1, 2 1, 2 1, 2 LO2 = IFLO/2 Test Condition Note 1 1 1
Note:
1. These values are not tested in mass production. 2. The loss (3.6 dB) of test circuit at Mixer2 output is calculated.
15
HD155121F
* PGA and IQ Demodulator specifications (terminated by 10 k at IQ demodulator output)
Item Input frequency Gain range Gain linearity Gain step Noise figure 1 Noise figure 2 Noise figure 3 Gain 1 Gain 2 Gain 3 i/p CP 1 i/p CP 2 i/p CP 3 IQ phase accuracy IQ amplitude mismatch Output DC offset voltage Mode Min 40 -- -0.8 -- -- -- -- 47.0 7.0 -33.0 -70.5 -37 -14 -- -- 0 Typ 45 98 -- 2 10.9 21.2 53.4 51.5 11.5 -28.5 -66 -34 -11 0.2 0.1 -- Max 60 -- 0.8 -- 14 24 60 56.0 16.0 -24.0 -- -- -- 1.0 0.5 | 60 | Unit MHz dB dB dB dB dB dB dB dB dB dBm dBm dBm deg. dB mV IF2 = 45MHz, bitNo46 IF2 = 45MHz, bitNo26 IF2 = 45MHz, bitNo6 IF2 = 45MHz, bitNo46 IF2 = 45MHz, bitNo26 IF2 = 45MHz, bitNo6 IF2 = 45MHz, bitNo46 IF2 = 45MHz, bitNo26 IF2 = 45MHz, bitNo6 Baseband = 67.7kHz Baseband = 67.7kHz | IOUT-IOUTB | and | QOUT-QOUTB | Load out = 10k Baseband = 67.7kHz IOUT, IOUTB, QOUT, QOUTB Load out = 10k 2 (in any 20dB window) Test Condition Note 1 1 1 1 1, 2 1, 2 1, 2 2 2 2 2 2 2
IQ maximum output swing (Single ended)
0.8
1.06
--
Vp-p
I/Q common mode output voltage Note:
1.15
1.35
1.55
V
1. These values are not tested in mass production. 2. The loss (3.6 dB) of test circuit at PGA input is calculated.
16
HD155121F
* IQ Modulator and Offset PLL specifications (IFLO is supplied by signal generator equipment)
Item Frequency (RF) Mode GSM PCN Frequency (LO) GSM PCN Frequency (IF) GSM PCN RFLO input level IFLO input level VCOIN1 & VCOIN2 input level Carrier suppression ratio Side-band suppression ratio Min 880 1710 1150 1530 -- -- -8 -20 -25 31 35 Typ -- -- -- -- 270 135 -- -10 -15 40 40 Max 915 1785 1185 1665 -- -- -- -- -10 -- -- Unit MHz MHz MHz MHz MHz MHz dBm dBm dBm dBc dBc All `1' GMSK (Differential encode: off) (Baseband = 67.7kHz) I/Q input swing = 1.0Vp-p, I/Q common mode input voltage = 1.0Vdc 200kHz BW 200kHz BW 200kHz BW 200kHz BW 200kHz offset 30kHz bandwidth 400kHz offset 30kHz bandwidth 600kHz to 1.8MHz offset 30kHz bandwidth 1.8MHz to 3MHz offset 100kHz bandwidth 3MHz to 6MHz offset 100kHz bandwidth 6MHz upward offset 100kHz bandwidth 1 IIN, IINB, QIN, QINB IIN, IINB, QIN, QINB IPLLOUT GSM : IPLLOUT PCN offset current / output current IIN = 1.5V (DC), IINB = 0.5V (DC) QIN = 1.5V (DC), QINB = 0.5V (DC) 1 1 1 1 1 1 1 1 1 1 1 1 1 Test Condition Note 1
Phase accuracy
GSM GSM PCN PCN
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.8 0.8 -- 0.30
1.0 3.0 1.0 3.0 -34.0 -34.5 -68.0 -67.0 -71.0 -70.0 -71.5 -72.0 -74.0 -74.0 -76.0 -76.0 43 1.0 1.0 1:0.5 0.35
2.5 7.5 2.4 7.0 -- -- -- -- -- -- -- -- -- -- -- -- -- 1.2 1.2 -- 0.45
RMS peak RMS peak dB dB dB dB dB dB dB dB dB dB dB dB dB Vp-p V
Modulation spectrum
GSM PCN
Spectrum analyzer condition Detector mode: positive peak
GSM PCN GSM PCN GSM PCN GSM PCN GSM PCN
Isolation of the 1st local input to TxVCO input IQ input swing (Single ended) I/Q common mode input voltage PLLOUT output current ratio Phase detector offset current ratio
Note:
1. These values are not tested in mass production.
17
HD155121F
* IQ Modulator and Offset PLL specifications (IFLO is supplied by signal generator equipment) (cont)
Item Tx noise in Rx band Mode GSM GSM PCN PCN Lock up time GSM PCN Note: Min -- -- -- -- -- -- Typ -155.1 -164.1 -156 -162 35 65 Max -- -- -- -- 80 80 Unit dBc/Hz dBc/Hz dBc/Hz dBc/Hz sec sec Test Condition 925MHz to 935MHz - 10MHz up from Txband 935MHz to 960MHz - 20MHz up from Txband 1805MHz - 20MHz up from Txband 1850MHz - 65MHz up from Txband 1 Note 1
1. These values are not tested in mass production.
* IFVCO specifications
Item Bias current Mode Min 0.9 Typ 2.0 Max 2.5 Unit mA Test Condition
18
HD155121F
Rx Gain Control Stage
The PGA amplifier of the HD155121F is the main Rx gain control stage. However, Mixer1 and Mixer2 gain level can switched as an optional function in order to optimize system performance.
Mixer1 LNA bias circuit LNA bias circuit Mixer1 Mixer2 PGA I&Q Demo. I Q
Decoder CLK (26) SDATA (27) LE (28)
X7 X6 X5 X4 X3 X2 X1 X0 Serial data X7 : for Mixer1 gain X6 : for Mixer2 gain X5 : Bit allocation X4 : X3 : for PGA gain X2 : X1 : X0 :
Figure 1 Table 2
Item Gain 1 (normal gain)
First Mixer Gain Control Table (as optional function)
Band GSM PCN Gain (typ) 9.5 dB 8.5 dB -2.5 dB -3.5 dB X7 0 0 1 1
Gain 2 (low gain)
GSM PCN
Table 3
Item
Second Mixer Gain Control Table (as optional function)
Gain (Typ) 13.0 dB -3.0 dB X6 0 1
Gain 1 (normal gain) Gain 2 (low gain)
19
HD155121F
Table 4 PGA and IQ Demodulator Block Gain Control
Gain (dB) (Typ) 57.5 55.5 53.5 51.5 49.5 47.5 45.5 43.5 41.5 39.5 37.5 35.5 33.5 31.5 29.5 27.5 25.5 23.5 21.5 19.5 17.5 15.5 13.5 11.5 9.5 7.5 5.5 3.5 1.5 -0.5 -2.5 -4.5 -6.5 -8.5 -10.5 -12.5 -14.5 -16.5 -18.5 -20.5 -22.5 -24.5 -26.5 -28.5 -30.5 -32.5 -34.5 -36.5 -38.5 -40.5 Bit Allocation X3 X2 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0
bitNo 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
X5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
X4 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
X1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
X0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
20
HD155121F
Serial Data Interface
tcyc CLK MSB SDATA X7 tstup thld X6 X5 X4 X3 X2 X1 LSB X0 tsule
LE twle
Figure 2 Three-Wire Bus Timing Diagram
Serial Data Interface Specifications (VCC = 3 V, Ta = 25C unless otherwise specified)
Item Cycle time Setup time Hold time LE setup time LE width Note: Symbol tcyc tstup thld tsule twle Min 50 10 10 25 25 Typ -- -- -- -- -- Max -- -- -- -- -- Unit nsec nsec nsec nsec nsec Test Condition Note 1 1 1 1 1
1. These values are not tested in mass production. 2. User can program the data for the PGA, while in any state.
21
22
DCS MIX1 RFIN(J7) MIX1 IF OUTPUT(J6) VCC UHF LO VCC INPUT(J10) POONRX2 POONTX POONRX1 1000p 1000p 1000p TOKO 617PT-1206 5 3 2 4 1 6p 0.1 1000p 47 220n (Q>40) 0.5p 0 1000p 15n 4p VHS LO IN/OUT(J11) 1000p 4.7n 2p no fit 37 38 39 40 41 42 43 44 45 46 47 48
RFLOIN MIX1IN2 VCCDIV GNDDIV POONTX VCCMIX1 MIX1OUT GNDMIX1 MIX1INB2
Test Circuit
3p
HD155121F
GSM MIX1 RFIN(J3)
2p
12n
820
2p
10n
GSM LNA RFOUT(J2)
47p
Siemens: BFP420
GSM LNA RFIN(J4)
0 22p
6.8n
10k
2p
no fit
10p
1p no fit no fit no fit
MIX1INB1 MIX1IN1 RFOUT RFIN1 RFIN2 VCCPLL GNDPLL VCOIN2 VCOIN1 VCCCOMP PLLOUT ICURAD MIX2O CLK SDATA LE IFINB IFIN GNDIF VCCIF IFVCOI IFVCOO BAND IFLO
3.3n
DCS LNA RFOUT(J8)
47p
0 VTUNE no fit no fit no fit no fit
POONRX2
POONRX1
MIX1OUTB
Siemens: BFP420
DCS LNA RFIN(J9)
0 10p
2.7n
10k
1p
no fit
10p
VCC
1000p
no fit
BAND VCC 1000p 8p 100n 8p 0 MIX2 IF INPUT(J5)
HD155121F
VCCCOMP
1000p
1 2 3 4 5 6 7 8 9 10 11 12 22k
IIN
36 35 34 33 32 31 30 29 28 27 26 25
33p
MODLB VCCIQ MIX2OB QOUTB GNDIQ IOUTB QOUT QINB IOUT IINB QIN
1p
33p
TX_VCO2 OUTPUT (J14) 24 23 22 21 20 19 18 17 16 15 14 13
100
68
100
VCCVCO2
10
1000p 1000p
IOUT IOUTB QOUT
MURATA MQE9P7-1747 Kv=47MHz/V 4 3 OUT VCC 5 2 GND GND 6 MOD CON 1 0000 0000
390
TOKO 617DB-1018 4 3 2 1 5
TX VCO2 1000p 560p
33p
1p
33p
TX_VCO1 OUTPUT (J12)
100
68
1000p
100
VCCVCO1
10
1000p
10k 10k 10k 10k 33 6800p QIN IIN QINB IINB VCC QOUT IOUT QOUTB IOUTB MIX2 OUTPUT /PGA INPUT(J1)
MURATA MQE9P7-897 Kv=30MHz/V 4 3 OUT VCC 5 2 GND GND 6 MOD CON 1
390
TX VCO1
HD155121F
Typical Performance
Power Supply Current Typical Performance
ICC [mA] A VCC = 3.0V 6 10 17 18 32 38 41 42 43 LNA bias current [mA] = (Vb - Va) / 10 b 10 a for GSM b 10 a for PCN 4.7k TRS: Siemens BFP420 10p 5 7 19 31 37 40 Unit: R : C:F 4.7k no fit 10p Active bias circuit
+-
no fit 10p
Rx 3 4
+-
Tx Low Low High
POONRX1 44 POONRX2 45 POONTX 46 BAND 35 LE 28 SDATA 27 CLK 26
High High Low
High for PCN Low for GSM Bit number 26
Figure 3 Power supply current does not include the LNA bias current calculated by below formula.
Power supply current [mA] = ICC [mA] - LNA Bias current [mA]
23
HD155121F
Power Supply Current Typical Performance (cont)
Receive mode Power supply current vs. VCC and Temperature GSM mode, Gain1 (Normal gain), Bit No.26 70
Operating voltage range
Receive mode Power supply current vs. VCC and Temperature PCN mode, Gain1 (Normal gain), Bit No.26 70 Power supply current (mA)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
Power supply current (mA)
65 60 55 50 45 40 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
65 60 55 50 45 40 2
2.5
3
3.5 4 VCC (V)
4.5
5
2.5
3
3.5 4 VCC (V)
4.5
5
Transmit mode Power supply current vs. VCC and Temperature GSM mode 55
Operating voltage range
Transmit mode Power supply current vs. VCC and Temperature PCN mode 55 Power supply current (mA)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
Power supply current (mA)
50 45 40 35 30 25 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
50 45 40 35 30 25 2
2.5
3
3.5 4 VCC (V)
4.5
5
2.5
3
3.5 4 VCC (V)
4.5
5
24
HD155121F
LNA Bias Circuit Typical Performance
VCC = 3.0V 6 17 18 32 38 41 42 43 Bias current [mA] = (Vb - Va) / 10 b 10 a for GSM b 10 a for PCN 4.7k TRS: Siemens BFP420 10p 5 7 19 31 37 40 Unit: R : C:F 4.7k no fit 10p Active bias circuit
+-
no fit 10p
3 4
+-
POONRX1 44 POONRX2 45 POONTX 46 BAND 35 LE 28 SDATA 27 CLK 26
High High Low High for PCN Low for GSM all bit = 0 (no care)
Figure 4
Bias current vs. VCC and Temperature 6.4
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
Bias current (mA) @Ext. TRS
6.2 6.0 5.8 5.6 5.4 5.2 5.0 2
2.5
3.5 3 VCC (V)
4
4.5
25
HD155121F
Mixer1 Typical Performance
TOKO 617PT-1206, insertion loss 2.2dB 800 : 50 VCC = 3.0V 6 10 17 18 32 38 41 44 45 Mixer1 *1 2 12n 2.5p Input (PCN_RF) 1842MHz: -30dBm (50) 6p 48 4.7n 1.5p Input (Lo) GSM: 1165MHz, -8dBm PCN: 1617MHz, -8dBm 47 BAND 35 CLK 26 SDATA 27 LE 28 7 46 31 37 40 Unit: R : C:F Note: 1. Mixer1 is open collector type. 2. Please tune this LC resonant circuit to get the maximum conversion gain at 225MHz. Gain1: X7 = 0 for High gain Gain2: X7 = 1 for Low gain other bit is no care GSM: "Low" PCN: "High" 1 Mixer1 43 220n (Q>40) 1000p 42 1000p 1000p Output (IF) 225MHz (50)
VCC = 3.0V 1000p
Input (GSM_RF) 940MHz: -30dBm (50)
2p
*2 0.5p
1000p 1000p 39 47
Figure 5
Item Input (RF) Z
Mode GSM PCN
Min -- -- -- -- -- -- -- -- --
Typ 50 50 800 50 50 -- -- -- --
Max -- -- -- -- -- 2 2 2 4
Unit
Test Condition RF = 940MHz RF = 1842MHz IF = 225MHz IF = 225MHz LO = 1165, 1617MHz RF = 940MHz RF = 1842MHz LO = 1150 to 1185MHz LO = 1580 to 1655MHz
Note 1
Differential output load between pin42 and pin43 Output (IF) Z Input (LO) Z Input (RF) VSWR
-- -- -- GSM PCN
1 1 1 1
Input (LO) VSWR
GSM PCN
1
Note:
1. These values are not tested in mass production.
26
HD155121F
Mixer1 Typical Performance (cont) * Mixer1 S parameters
Frequency (MHz) 895 900 905 910 915 920 925 930 935 940 945 950 955 960 965 970 975 980 985 990
Port1: pin2 (MIX1IN1)
Port2: pin1 (MIX1INB1)
S11 S21 S12 S22 Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) 754.62 -82.557 109.41 91.89 107.94 90.73 739.46 -79.502 752.44 -82.957 111.75 91.71 110.03 90.71 737.07 -79.884 752.00 -83.314 114.04 91.39 112.02 90.57 735.32 -80.164 750.32 -83.658 116.14 90.76 113.69 90.19 733.45 -80.543 749.06 -84.053 117.73 90.14 115.37 89.68 732.38 -80.877 748.42 -84.440 119.37 89.31 116.73 89.03 731.16 -81.223 748.51 -84.849 120.64 88.41 118.02 88.48 730.91 -81.544 747.39 -85.213 121.21 87.64 118.93 87.72 729.92 -81.910 747.02 -85.626 121.81 86.90 119.54 87.08 729.54 -82.283 747.44 -86.053 121.93 85.90 119.78 86.27 729.38 -82.668 747.37 -86.488 121.22 85.11 119.74 85.56 730.05 -83.100 747.45 -87.054 119.98 84.55 119.01 85.13 730.63 -83.532 747.73 -87.535 118.34 84.32 117.70 84.95 730.78 -84.137 746.74 -88.119 116.90 84.63 116.32 85.38 730.02 -84.752 745.30 -88.735 116.23 85.41 116.29 86.13 728.56 -85.411 743.28 -89.301 116.77 86.34 116.94 87.04 724.68 -86.052 740.18 -89.825 118.14 87.31 119.06 87.75 721.14 -86.574 737.01 -90.247 120.72 87.54 121.81 87.96 717.34 -86.974 734.02 -90.646 123.00 87.15 124.35 87.64 713.39 -87.278 732.70 -90.928 124.32 86.51 125.87 86.67 711.49 -87.564
* Mixer1 S parameters
Frequency (MHz) 1795 1800 1805 1810 1815 1820 1825 1830 1835 1840 1845 1850 1855 1860 1865 1870 1875 1880 1885 1890
Port1: pin48 (MIX1IN2)
Port2: pin47 (MIX1INB2)
S11 S21 S12 S22 Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) 522.87 -137.31 173.99 54.38 179.98 56.40 601.94 -158.40 523.98 -137.67 174.59 54.42 178.85 56.36 601.55 -158.76 525.39 -138.01 174.84 54.36 178.30 56.29 600.91 -159.11 526.77 -138.39 175.19 54.40 177.57 56.30 600.89 -159.53 527.49 -138.68 175.11 54.23 176.49 56.34 599.30 -159.93 528.26 -139.03 175.97 54.08 176.09 56.40 599.71 -160.34 529.92 -139.36 175.84 53.85 175.23 56.38 598.92 -160.88 531.15 -139.75 175.93 53.54 174.88 56.61 598.29 -161.22 532.28 -140.13 176.03 53.25 174.18 56.57 597.93 -161.63 533.43 -140.54 175.87 52.85 173.91 56.55 597.23 -162.11 534.27 -140.93 175.65 52.50 172.74 56.68 596.37 -162.53 535.62 -141.23 175.01 52.14 172.61 56.61 596.30 -163.01 536.47 -141.66 174.36 51.65 171.73 56.67 594.72 -163.49 537.71 -142.01 173.43 51.37 171.48 56.79 594.24 -163.88 538.84 -142.45 172.32 51.08 170.72 56.84 592.85 -164.40 539.18 -142.85 170.91 50.76 170.10 56.93 592.38 -164.88 540.41 -143.27 169.63 50.55 169.55 56.99 591.02 -165.30 541.22 -143.76 167.87 50.28 168.56 56.99 590.16 -165.77 541.78 -144.18 166.42 50.26 168.32 57.05 589.17 -166.18 542.05 -144.59 164.56 50.29 167.81 57.13 588.64 -166.65
27
HD155121F
Mixer1 Typical Performance (cont) * Mixer1 S parameters
Frequency (MHz) 200 205 210 215 220 225 230 235 240 245 250 255 260 265 270 275 280 285 290 295
Port1: pin42 (MIX1OUT)
Port2: pin43 (MIX1OUTB)
S11 S21 S12 S22 Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) 979.93 -21.27 39.05 71.100 39.14 71.494 979.20 -21.64 979.30 -21.81 39.96 70.994 40.15 71.345 978.83 -22.17 978.24 -22.34 40.89 70.756 41.05 71.132 977.99 -22.73 977.43 -22.87 41.69 70.563 41.89 70.953 977.11 -23.29 976.58 -23.40 42.67 70.378 42.91 70.816 977.38 -23.85 976.18 -23.92 43.57 70.299 43.78 70.541 975.97 -24.42 975.31 -24.52 44.53 70.052 44.63 70.304 974.84 -25.00 975.16 -25.09 45.42 69.956 45.54 70.236 974.52 -25.58 974.11 -25.63 46.28 69.759 46.48 69.980 974.24 -26.15 973.55 -26.17 47.20 69.519 47.37 69.706 972.84 -26.77 972.26 -26.73 48.11 69.336 48.19 69.524 972.50 -27.34 972.06 -27.26 49.00 69.190 49.14 69.408 971.62 -27.92 970.73 -27.84 49.94 68.994 50.02 69.103 971.00 -28.50 970.76 -28.39 50.80 68.729 50.89 68.995 970.58 -29.05 970.42 -28.96 51.86 68.590 51.76 68.833 969.11 -29.65 969.30 -29.53 52.79 68.259 52.69 68.558 968.29 -30.23 968.44 -30.07 53.69 68.041 53.58 68.427 967.22 -30.82 967.83 -30.62 54.68 67.840 54.51 68.220 966.67 -31.40 967.14 -31.22 55.62 67.524 55.43 67.966 965.98 -32.00 966.09 -31.81 56.58 67.183 56.32 67.699 965.50 -32.63
* Mixer1 S parameters
Frequency (MHz) 1120 1125 1130 1135 1140 1145 1150 1155 1160 1165 1170 1175 1180 1185 1190 1195 1200 1205 1210 1215
Port1: pin39 (RFLOIN)
S11 Mag.(mU) Ang.(degree) 690.53 -101.924 689.12 -102.299 686.98 -102.703 685.49 -103.040 683.72 -103.392 682.04 -103.758 679.93 -104.098 677.68 -104.415 675.71 -104.781 674.24 -105.128 671.69 -105.454 669.77 -105.790 667.97 -106.114 664.89 -106.415 663.02 -106.713 661.31 -107.018 658.60 -107.243 656.49 -107.590 653.78 -107.769 651.73 -108.016
S11 Frequency Mag.(mU) Ang.(degree) (MHz) 831.05 -71.478 1570 829.47 -71.805 1575 827.93 -72.134 1580 827.36 -72.485 1585 825.87 -72.816 1590 825.65 -73.101 1595 823.25 -73.414 1600 823.08 -73.701 1605 821.69 -74.035 1610 820.33 -74.371 1615 820.23 -74.659 1620 818.66 -75.064 1625 817.64 -75.335 1630 816.39 -75.674 1635 815.89 -76.100 1640 813.73 -76.425 1645 813.55 -76.784 1650 812.42 -77.127 1655 811.32 -77.471 1660 810.04 -77.885 1665
28
HD155121F
Mixer1 Typical Performance (cont)
Conversion gain vs. VCC and Temperature GSM mode. Gain1 (Normal gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
15 14 13 Conversion gain (dB) 12 11 10 9 8 7 6
3 2 1 Conversion gain (dB) 0 -1 -2 -3 -4 -5 -6
Conversion gain vs. VCC and Temperature GSM mode. Gain2 (Low gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
5 2
2.5
3.5 3 VCC (V)
4
4.5
-7 2
2.5
3.5 3 VCC (V)
4
4.5
15 14 13 Conversion gain (dB) 12 11 10 9 8 7 6
Conversion gain vs. VCC and Temperature PCN mode. Gain1 (Normal gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
3 2 1 Conversion gain (dB) 0 -1 -2 -3 -4 -5 -6
Conversion gain vs. VCC and Temperature PCN mode. Gain2 (Low gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
5 2
2.5
3 3.5 VCC (V)
4
4.5
-7 2
2.5
3.5 3 VCC (V)
4
4.5
29
HD155121F
Mixer1 Typical Performance (cont)
Noise figure(SSB) vs. VCC and Temperature GSM mode. Gain1 (Normal gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
15 14 13 12 NF SSB (dB) 11 10 9 8 7 6
20 19 18 17 NF SSB (dB) 16 15 14 13 12 11
Noise figure(SSB) vs. VCC and Temperature GSM mode. Gain2 (Low gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
5 2
2.5
3.5 3 VCC (V)
4
4.5
10 2
2.5
3.5 3 VCC (V)
4
4.5
15 14 13 12 NF SSB (dB) 11 10 9 8 7 6
Noise figure(SSB) vs. VCC and Temperature PCN mode. Gain1 (Normal gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
20 19 18 17 NF SSB (dB) 16 15 14 13 12 11
Noise figure(SSB) vs. VCC and Temperature PCN mode. Gain2 (Low gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
5 2
2.5
3 3.5 VCC (V)
4
4.5
10 2
2.5
3.5 3 VCC (V)
4
4.5
30
HD155121F
Mixer1 Typical Performance (cont)
1dB Input compression point vs. VCC and Temperature GSM mode. Gain1 (Normal gain) 1dB Input compression point (dBm)
Operating voltage range
-5 1dB Input compression point (dBm) -6 -7 -8 -9 -10 -11 -12 -13 -14
0 -1 -2 -3 -4 -5 -6 -7 -8 -9
1dB Input compression point vs. VCC and Temperature GSM mode. Gain2 (Low gain)
Operating voltage range
-15 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
2.5
3.5 3 VCC (V)
4
4.5
-10 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
2.5
3.5 3 VCC (V)
4
4.5
-10 1dB Input compression point (dBm) -11 -12 -13 -14 -15 -16 -17 -18 -19
1dB Input compression point vs. VCC and Temperature PCN mode. Gain1 (Normal gain) 1dB Input compression point (dBm)
Operating voltage range
-5 -6 -7 -8 -9 -10 -11 -12 -13 -14
1dB Input compression point vs. VCC and Temperature PCN mode. Gain2 (Low gain)
Operating voltage range
-20 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
2.5
3 3.5 VCC (V)
4
4.5
-15 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
2.5
3.5 3 VCC (V)
4
4.5
31
HD155121F
Mixer1 Typical Performance (cont)
Delta (Gain1-Gain2) vs. VCC and Temperature GSM mode.
Operating voltage range
15 Delta (Gain1-Gain2) gain (dB) 14 13 12 11 10 9 8 7 6
15 Delta (Gain1-Gain2) gain (dB) 14 13 12 11 10 9 8 7 6
Delta (Gain1-Gain2) vs. VCC and Temperature PCN mode.
Operating voltage range
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
5 2
2.5
3.5 3 VCC (V)
4
4.5
5 2
2.5
3.5 3 VCC (V)
4
4.5
32
HD155121F
Mixer2 Typical Performance
VCC = 3.0V 6 17 18 32 38 41 42 43 High High Low Input (IF1) 50 8p 225MHz -50dBm 100n 8p Input2 (IFLO) 50 4p 540MHz -10dBm 15n 1000p 7 19 31 37 40 Unit: R : C:F 44 POONRX1 45 POONRX2 46 POONTX IF Amp MIX2 30 29 /2 DIV 300 PGA 300 TOKO 617DB1018 (200: 50) Test circuit insertion loss = 3.6dB 1000p 50Output (IF2) 25 45MHz NC 24 1000p BAND 35 Low X6 = 0 for High gain X6 = 1 for Low gain other bit is no care
36
LE 28 DEM SDATA 27 CLK 26
Figure 6
Item Input (IF) Z LO Z i/p VSWR LO VSWR Note:
Mode
Min -- -- -- --
Typ 50 50 -- --
Max -- -- 2 2
Unit
Test Condition IF1 = 225MHz IFLO = 540MHz IF1 = 225MHz IFLO = 540MHz
Note 1 1 1 1
1. These values are not tested in mass production.
33
HD155121F
Mixer2 Typical Performance (cont) * Mixer2 S parameters
Frequency (MHz) 200 205 210 215 220 225 230 235 240 245 250 255 260 265 270 275 280 285 290 295
Port1: pin30 (IFIN)
Port2: pin29 (IFINB)
S11 S21 S12 S22 Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) Mag.(mU) Ang.(degree) 941.92 -20.936 47.84 12.570 47.77 12.517 941.65 -20.558 940.46 -21.513 47.91 12.808 47.89 12.829 941.18 -21.073 940.85 -22.040 47.97 13.024 47.92 13.065 939.92 -21.628 940.32 -22.592 47.99 13.297 47.92 13.257 939.52 -22.145 938.32 -23.094 48.03 13.499 47.89 13.489 938.70 -22.689 938.11 -23.735 48.05 13.659 47.91 13.702 937.66 -23.198 936.93 -24.288 48.02 14.001 48.00 13.969 937.61 -23.777 936.23 -24.863 48.10 14.233 47.98 14.257 936.56 -24.355 935.61 -25.424 48.15 14.539 48.09 14.500 936.05 -24.928 934.29 -26.032 48.20 14.795 48.04 14.759 934.73 -25.481 933.31 -26.599 48.26 15.017 48.12 15.039 934.55 -26.039 933.20 -27.186 48.29 15.299 48.21 15.309 933.47 -26.606 932.03 -27.743 48.38 15.529 48.26 15.529 933.28 -27.110 931.63 -28.351 48.56 15.749 48.30 15.751 931.86 -27.702 930.97 -28.923 48.57 15.992 48.40 16.056 931.63 -28.224 929.68 -29.513 48.66 16.216 48.50 16.351 930.13 -28.763 928.75 -30.038 48.77 16.482 48.58 16.598 929.21 -29.315 927.72 -30.634 48.92 16.685 48.71 16.773 928.79 -29.899 927.06 -31.230 49.03 16.858 48.84 17.000 927.41 -30.498 925.35 -31.837 49.12 17.022 48.94 17.193 926.34 -31.043
34
HD155121F
Mixer2 Typical Performance (cont)
Conversion gain vs. VCC and Temperature Gain1 (Normal gain)
Operating voltage range
17 16 Conversion gain (dB)
1 0 Conversion gain (dB) -1 -2 -3 -4 -5 -6
Conversion gain vs. VCC and Temperature Gain2 (Low gain)
Operating voltage range
15 14 13 12 11 10 9 2 2.5 3.5 3 VCC (V)
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
4
4.5
-7 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
2.5
3.5 3 VCC (V)
4
4.5
10 9 8 Noise figure (dB) 7 6 5 4 3
Noise figure vs. VCC and Temperature Gain1 (Normal gain)
Operating voltage range
16 15 14 Noise figure (dB) 13 12 11 10 9
Noise figure vs. VCC and Temperature Gain2 (Low gain)
Operating voltage range
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
2 2
2.5
3 3.5 VCC (V)
4
4.5
8 2
2.5
3.5 3 VCC (V)
4
4.5
35
HD155121F
Mixer2 Typical Performance (cont)
1dB Input compression point vs. VCC and Temperature Gain1 (Normal gain) 1dB Input compression point (dBm)
Operating voltage range
-10 1dB Input compression point (dBm)
-5
1dB Input compression point vs. VCC and Temperature Gain2 (Low gain)
Operating voltage range Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
-15
-10
-20
-15
-25
-30 2
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
-20
2.5
3.5 3 VCC (V)
4
4.5
-25 2
2.5
3 3.5 VCC (V)
4
4.5
18.0 Delta(Gain1-Gain2) gain (dB) 17.5 17.0 16.5 16.0 15.5 15.0 14.5
Delta(Gain1-Gain2) vs. VCC and Temperature
Operating voltage range
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
14.0 2
2.5
3.5 3 VCC (V)
4
4.5
36
HD155121F
PGA and Demodulator Typical Performance
Serial data VCC = 3.0V 26 27 28 SDATA LE CLK 6 17 18 38 32 IQ OPLL MODLB DIV IF
fin: 540MHz -10dBm 4p
15n 36
POONRX1 44 POONRX2 45 POONTX 46 IOUT 23 10k RX mode
IFLO
DIV MIX2
0,90,180,270 degree (45MHz)
GMSK modulated wave Carrier: 45MHz 25 1000p 1000p TOKO 617DB-1018 Insertion loss = 3.6dB 24 MIX2O
300 PGA IOUTB IQ Demo. 22
MIX2OB 300
10k QOUT 21 10k QOUTB BAND 20 10k
Measurement equipment
OPLL
DIV
IQ
7 19 37 31 35 Unit: R : C:F
Figure 7
IF
37
HD155121F
PGA and Demodulator Typical Performance (cont)
Power gain vs. Bit number with Temperature VCC = 3V Power gain vs. VCC and Temperature 60 40 Power gain (dB) 20 0 -20 -40 -60
Operating voltage range Bit number 6 Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C Bit number 26 Bit number 46
60 40 Power gain (dB) 20 0 -20 -40
-60 0
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
10
20 30 Bit number
40
50
-80 2
2.5
3.5 3 VCC (V)
4
4.5
0 1dB Input compression point (dBm) -10 -20 -30 -40 -50 -60
1dB Input compression point vs. Bit number VCC = 3V, Ta = 25C 1dB Input compression point (dBm)
0 -10 -20 -30 -40 -50 -60
1dB Input compression point vs. VCC and Temperature
Operating voltage range
Ta=-40C Ta=-25C Ta=27C Ta=85C Ta=100C
-70 0
10
20 30 Bit number
40
50
-70 2
2.5
3.5 3 VCC (V)
4
4.5
38
HD155121F
PGA and Demodulator Typical Performance (cont)
Frequency response of LPF in Demodulator 20
sim.(typical) sim.(worst)
Frequency (kHz) sim.(typ) sim.(worst) 10 120 200 400 600 800 1600 3000 20000 0.0 -1.2 -4.0 -14.0 -22.3 -29.2 -49.8 -47.3 -62.3 0.0 -0.5 -1.6 -7.9 -14.7 -20.3 -37.6 -46.3 -58.7
0 Rejection (dB) -20 -40 -60 -80 10
100 1000 10000 Frequency (kHz)
100000
60 40 IQ offset voltage (mV) 20 0 -20 -40
IQ offset voltage vs. VCC and Temperature GSM mode
Operating voltage range
60 40 IQ offset voltage (mV) 20 0 -20 -40
IQ offset voltage vs. VCC and Temperature PCN mode
Operating voltage range
-60 2
I Ta=-40C I Ta=-25C I Ta=27C I Ta=85C I Ta=100C
Q Ta=-40C Q Ta=-25C Q Ta=27C Q Ta=85C Q Ta=100C
2.5
3 3.5 VCC (V)
4
4.5
-60 2
I Ta=-40C I Ta=-25C I Ta=27C I Ta=85C I Ta=100C
Q Ta=-40C Q Ta=-25C Q Ta=27C Q Ta=85C Q Ta=100C
2.5
3.5 3 VCC (V)
4
4.5
39
HD155121F
IQ Modulator and OffsetPLL Typical Performance
3V 10 COMP 6 17 18 38 32 IQ OPLL MODLB DIV IF
VCC = 3.0V
fin: 540MHz -10dBm 4p I
15n 36
POONRX1 44 TX mode
IFLO
DIV
16
IIN
POONRX2 45 0,90,180,270 POONTX 46 degree (270MHz) 560p PLLOUT 11
I Ibar IINB 15 Digital I, Ibar, modulation Q, Qbar signal Q generator Q QIN 14 generator Qbar Differential encode: off OPLL DIV IQ 13 QINB
33 390 6800p IQ Mod. Offset PLL VCOIN1 33p 68 9 100 VCOIN2 ICURAD RFLOIN BAND 33p 68 8 100 100 390 1p 1p
TxVCO MURATA MQE9P7-897 33p
Spectrum analyzer
100 TxVCO MURATA MQE9P7-1747 33p Detector mode: positive peak Unit: R : C:F
7 19 37 31
IF
39
12 22k
35 GSM "Low" PCN "High"
fin: 1167MHz -8dBm
1000p 1000p 47
Figure 8 * Phase detector offset current ratio evaluation circuit
1000p 1000p Signal generator 47 GSM: VCOIN1 = 901MHz, -20dBm PCN: VCOIN2 = 1746MHz, -20dBm Signal generator 1000p 9 VCOIN1 1000p Oscillo scope 47 2.5V 12 ICURAD 22k 11 PLLOUT IIN 16 IINB 15 QIN 14 QINB 13 1.5V 0.5V 1.5V 0.5V Unit: R : C:F 8 VCOIN2 39 RFLOIN IFLO 36 47 GSM: 1172MHz, -8dBm PCN: 1612MHz, -8dBm 1000p IFLO: 540MHz, -10dBm Signal generator
Figure 9
40
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont)
Tx spectrum vs. Temperature GSM mode (902MHz)
Carrier suppression ratio Side-band suppression ratio
100
100
Tx spectrum vs. Temperature PCN mode (1747MHz)
Carrier suppression ratio Side-band suppression ratio
Suppression ratio (dBc)
Suppression ratio (dBc)
Operating voltage range
80
80
60
60
40
40
20
20
Operating voltage range
0 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
0 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
100
Tx spectrum vs. VCC GSM mode (902MHz)
Carrier suppression ratio Side-band suppression ratio
100
Tx spectrum vs. VCC PCN mode (1747MHz)
Carrier suppression ratio Side-band suppression ratio
Suppression ratio (dBc)
60
Suppression ratio (dBc)
Operating voltage range
80
80
60
40
40
20
20
Operating voltage range
0 2
2.5
3.5 3 VCC (V)
4
4.5
0 2
2.5
3.5 3 VCC (V)
4
4.5
41
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont)
Phase error vs. Temperature GSM mode (902MHz)
RMS peak
10 9 8 Phase error (degree) 7 6 5 4 3 2 1
10 9 8 Phase error (degree) 7 6 5 4 3 2 1
Phase error vs. Temperature PCN mode (1747MHz)
RMS peak Operating voltage range
Operating voltage range
0 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
0 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
10 9 8 Phase error (degree) 7 6 5 4 3 2 1
Phase error vs. VCC GSM mode (902MHz)
RMS peak
10 9 8 Phase error (degree) 7 6 5 4 3 2 1
Phase error vs. VCC PCN mode (1747MHz)
RMS peak Operating voltage range
Operating voltage range
0 2
2.5
3.5 3 VCC (V)
4
4.5
0 2
2.5
3.5 3 VCC (V)
4
4.5
42
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont)
Modulation spectrum vs. Temperature GSM mode (902MHz)
200kHz offset 400kHz offset 600kHz to 1800kHz 1.8MHz to 3MHz 3MHz to 6MHz 6MHz upward offset
0 -20 -40 -60 -80
0 -20 -40 -60 -80
Modulation spectrum vs. Temperature PCN mode (1747MHz)
200kHz offset 400kHz offset 600kHz to 1800kHz 1.8MHz to 3MHz 3MHz to 6MHz 6MHz upward offset
Suppression ratio (dB)
Operating voltage range
Suppression ratio (dB)
Operating voltage range
-100 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
-100 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
0 -20 -40 -60 -80
Modulation spectrum vs. VCC GSM mode (902MHz)
200kHz offset 400kHz offset 600kHz to 1800kHz 1.8MHz to 3MHz 3MHz to 6MHz 6MHz upward offset
0 -20 -40 -60 -80
Modulation spectrum vs. VCC PCN mode (1747MHz)
200kHz offset 400kHz offset 600kHz to 1800kHz 1.8MHz to 3MHz 3MHz to 6MHz 6MHz upward offset
Suppression ratio (dB)
Operating voltage range
Suppression ratio (dB)
Operating voltage range
-100 2
2.5
3.5 3 VCC (V)
4
4.5
-100 2
2.5
3.5 3 VCC (V)
4
4.5
43
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont)
Lock up time vs. Temperature GSM mode (902MHz) Lock up time vs. Temperature PCN mode (1747MHz)
100
100
80 Lock up time (sec) Lock up time (sec)
Operating voltage range
80
60
60
40
40
20
20
Operating voltage range
0 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
0 -60 -40 -20 0 20 40 60 80 100 120 Temperature (C)
100
Lock up time vs. VCC GSM mode (902MHz)
100
Lock up time vs. VCC PCN mode (1747MHz)
80 Lock up time (sec) Lock up time (sec)
Operating voltage range
80
60
60
40
40
20
20
Operating voltage range
0 2
2.5
3.5 3 VCC (V)
4
4.5
0 2
2.5
3.5 3 VCC (V)
4
4.5
44
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont) * Modulation spectrum wave form vs. Temperature GSM mode (880 MHz)
ATTEN 20dB VAVG 100 10dB/ RL 10.3dBm MKR 9.77dBm 880.000MHz Specification D R D R ATTEN 20dB VAVG 100 10dB/ RL 10.7dBm MKR 10.20dBm 880.000MHz Specification D R ATTEN 20dB VAVG 100 RL 10.2dBm 10dB/ MKR 10.03dBm 880.000MHz Specification
CENTER 880.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 880.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 880.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
Ta = -40C
ATTEN 20dB VAVG 100 10dB/ RL 12.4dBm MKR 12.27dBm 880.00MHz ATTEN 20dB VAVG 100 RL 12.7dBm 10dB/
Ta = 27C
MKR 12.53dBm 880.00MHz ATTEN 20dB VAVG 100 RL 12.2dBm 10dB/
Ta = 100C
MKR 12.03dBm 880.00MHz
D R Specification
D R Specification
D R Specification
CENTER 880.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 880.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 880.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
* Modulation spectrum wave form vs. Temperature GSM mode (902 MHz)
ATTEN 20dB VAVG 100 10dB/ RL 10.0dBm MKR 9.62dBm 902.000MHz Specification D R D R ATTEN 20dB VAVG 100 10dB/ RL 10.2dBm MKR 10.50dBm 902.000MHz Specification D R ATTEN 20dB VAVG 100 RL 9.7dBm 10dB/ MKR 9.37dBm 902.000MHz Specification
CENTER 902.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 902.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 902.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
Ta = -40C
ATTEN 20dB VAVG 100 RL 12.3dBm 10dB/ MKR 12.12dBm 902.00MHz ATTEN 20dB VAVG 100 RL 12.7dBm 10dB/
Ta = 27C
MKR 12.50dBm 902.00MHz ATTEN 20dB VAVG 100 RL 11.8dBm 10dB/
Ta = 100C
MKR 12.00dBm 902.00MHz
D R Specification
D R Specification
D R Specification
CENTER 902.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 902.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 902.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
45
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont) * Modulation spectrum wave form vs. Temperature GSM mode (915 MHz)
ATTEN 20dB VAVG 100 RL 9.9dBm 10dB/ MKR 9.61dBm 915.000MHz Specification D R D R ATTEN 20dB VAVG 100 RL 10.4dBm 10dB/ MKR 9.73dBm 915.000MHz Specification D R ATTEN 20dB VAVG 100 RL 9.5dBm 10dB/ MKR 9.67dBm 915.000MHz Specification
CENTER 915.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 915.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 915.000MHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
Ta = -40C
ATTEN 20dB VAVG 100 10dB/ RL 12.1dBm MKR 12.28dBm 915.00MHz ATTEN 20dB VAVG 100 10dB/ RL 12.4dBm
Ta = 27C
MKR 12.40dBm 915.00MHz ATTEN 20dB VAVG 100 10dB/ RL 11.8dBm
Ta = 100C
MKR 11.83dBm 915.00MHz
D R Specification
D R Specification
D R Specification
CENTER 915.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 915.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 915.00MHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
46
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont) * Modulation spectrum wave form vs. Temperature PCN mode (1710 MHz)
ATTEN 20dB VAVG 100 10dB/ RL 8.5dBm MKR 8.36dBm 1.710000GHz Specification D R D R ATTEN 20dB VAVG 100 RL 9.2dBm 10dB/ MKR 8.90dBm 1.710000GHz Specification D R ATTEN 20dB VAVG 100 RL 9.4dBm 10dB/ MKR 9.23dBm 1.710000GHz Specification
CENTER 1.710000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 1.710000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 1.710000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
Ta = -40C
ATTEN 20dB VAVG 100 RL 10.9dBm 10dB/ MKR 11.03dBm 1.71000GHz ATTEN 20dB VAVG 100 RL 11.2dBm 10dB/
Ta = 27C
MKR 11.23dBm 1.71000GHz ATTEN 20dB VAVG 100 RL 11.5dBm 10dB/
Ta = 100C
MKR 11.20dBm 1.71000GHz
D R Specification
D R Specification
D R Specification
CENTER 1.71000GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 1.71000GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 1.71000GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
* Modulation spectrum wave form vs. Temperature PCN mode (1747 MHz)
ATTEN 20dB VAVG 100 10dB/ RL 9.4dBm MKR 8.76dBm 1.747000GHz Specification D R D R ATTEN 20dB VAVG 100 RL 9.4dBm 10dB/ MKR 9.58dBm 1.747000GHz Specification D R ATTEN 20dB VAVG 100 RL 9.5dBm 10dB/ MKR 9.17dBm 1.747000GHz Specification
CENTER 1.747000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 1.747000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 1.747000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
Ta = -40C
ATTEN 20dB VAVG 100 10dB/ RL 11.3dBm MKR 11.44dBm 1.74700GHz ATTEN 20dB VAVG 100 10dB/ RL 11.6dBm
Ta = 27C
MKR 11.58dBm 1.74700GHz ATTEN 20dB VAVG 100 10dB/ RL 11.9dBm
Ta = 100C
MKR 11.87dBm 1.74700GHz
D R Specification
D R Specification
D R Specification
CENTER 1.74700GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 1.74700GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 1.74700GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
47
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont) * Modulation spectrum wave form vs. Temperature PCN mode (1785 MHz)
ATTEN 20dB VAVG 100 RL 8.8dBm 10dB/ MKR 8.44dBm 1.785000GHz Specification D R D R ATTEN 20dB VAVG 100 RL 8.7dBm 10dB/ MKR 8.91dBm 1.785000GHz Specification D R ATTEN 20dB VAVG 100 RL 9.4dBm 10dB/ MKR 9.57dBm 1.785000GHz Specification
CENTER 1.785000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 1.785000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
CENTER 1.785000GHz *RBW 30kHz VBW 30kHz
SPAN 1.000MHz SWP 50.0ms
Ta = -40C
ATTEN 20dB VAVG 100 RL 11.3dBm 10dB/ MKR 10.94dBm 1.78500GHz ATTEN 20dB VAVG 100 10dB/ RL 11.4dBm
Ta = 27C
MKR 11.41dBm 1.78500GHz ATTEN 20dB VAVG 100 10dB/ RL 11.8dBm
Ta = 100C
MKR 11.66dBm 1.78500GHz
D R Specification
D R Specification
D R Specification
CENTER 1.78500GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 1.78500GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
CENTER 1.78500GHz SPAN 20.00MHz *RBW 100kHz VBW 100kHz SWP 50.0ms
48
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont)
Tx spectrum vs. Common mode voltage GSM mode (902MHz)
Carrier suppression ratio Side-band suppression ratio
0 -10 Suppression level (dBc) -20 -30 -40 -50 -60 -70 -80 -90
0 -10 Suppression level (dBc) -20 -30 -40 -50 -60 -70 -80 -90
Tx spectrum vs. Common mode voltage PCN mode (1747MHz)
Carrier suppression ratio Side-band suppression ratio
Operating range
Operating range
-100 0.25
0.50 0.75 1.00 1.25 1.50 Common mode voltage (V)
1.75
-100 0.25
0.50 0.75 1.00 1.25 1.50 Common mode voltage (V)
1.75
0 -10 Suppression level (dBc) -20 -30 -40 -50 -60 -70 -80 -90
Tx spectrum vs. Input swing level GSM mode (902MHz)
Carrier suppression ratio Side-band suppression ratio
0 -10 Suppression level (dBc) -20 -30 -40 -50 -60 -70 -80 -90 1.60
Tx spectrum vs. Input swing level PCN mode (1747MHz)
Carrier suppression ratio Side-band suppression ratio
Operating range
Operating range
-100 0.40
0.60 0.80 1.00 1.20 1.40 Input swing level (Vpp) (single)
-100 0.40
0.60 0.80 1.00 1.20 1.40 Input swing level (Vpp) (single)
1.60
49
HD155121F
IQ Modulator and OffsetPLL Typical Performance (cont)
Phase comparator output current (I1, I3) vs. VCC and Temperature 0.45 1.5
RICURAD = 22k at pin12 I1 I1,I3 Ta=-40C
1.2 I1 or I3 (mA)
0.4 I3/I1 (mA)
I1,I3 Ta=-25C I1,I3 Ta=27C I1,I3 Ta=85C I1,I3 Ta=100C I3/I1 Ta=-40C I3/I1 Ta=-25C I3/I1 Ta=27C I3/I1 Ta=85C I3/I1 Ta=100C
I3/I1
0.9
0.35
0.6
I3 Operating voltage range
0.3
0.3 2
2.5
3
3.5 4 VCC (V)
4.5
0.25 5
OPLL phase detector output current value is controlled by RICURAD(pin12). Following figure is for determining phase detector output current. 6
IPLLOUT (GSM) IPLLOUT (PCN)
5 IPLLOUT(Pin11) (mA) 4 3 2 1 0 1
10 RICURAD(Pin12) (k)
100
50
HD155121F
Package Dimensions
Preliminary
9.0 0.2 7.0 36 25 9.0 0.2 37 24 0.5
Unit: mm
48 12
13
*0.17 0.05 0.15 0.04
1.40 1.70 Max
1 *0.21 0.05 0.19 0.04 0.75
0.08
M
1.00 0.75 0 - 8 0.50 0.10
0.10
0.13 +0.09 -0.05
*Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
FP-48C Conforms 0.2 g
51
HD155121F
Appendix A
Transmitter Architecture (offset PLL architecture) The HD155121F generates a modulated signal at IF with a quadrature modulator and converts it to a final frequency with an Offset Phase Locked Loop (OPLL). The Offset Phase Locked Loop is simply a PLL with a down conversion mixer in the feedback path. Using a down converter in the feed back path acts as an up converter in the forward path, which allows the output frequency to be different from the comparison frequency without affecting the normal operation of the loop. Phase / frequency changes in the reference signal are not scaled, as they would be if a divider were used in the feed back path, and hence the modulation is faithfully reproduced at the final frequency. The main advantage of the OPLL in this application is that it forms a tracking band pass filter around the modulated signal. This is because the loop cannot respond to phase variations at the reference that are outside its closed loop bandwidth. Thus the broad band phase noise from the quadrature modulator is shaped by the frequency response of the closed loop allowing the TX noise specifications to be met without further filtering. A secondary advantage of the OPLL is that the output signal, coming from a VCO, is truly constant envelope. This removes the problem of spectral spreading caused by AM to AM and AM to PM conversion in the power amplifier. The OPLL is formed from an on-chip Gilbert cell down converter, limitters and phase detector with an offchip passive loop filter and VCO. The phase detector is implemented as a Gilbert cell with a current source output stage, which allows an integrator to be included in the passive loop filter. This is similar to the technique commonly used in PLL synthesizers. As is well known, when out of lock, a mixer type phase detector does not provide any frequency discrimination. This means that the under normal circumstances, a loop of this type is not guaranteed to lock. However in the HD155121F, a well defined offset current is added to the phase detector output, so that when the loop is out of lock, this offset current linearly charges the capacitors in the loop filter. This has the effect of sweeping the VCO across the band. When the down converted signal from the VCO approaches the reference frequency, the Gilbert cell begins to operate as a phase detector and the loop acquires in the normal way. The presence of the offset current in lock is unimportant, as it only results in a static phase offset between the final signal and the reference signal. At the end of the transmit burst, when the transmitter is disabled, a switch closes to discharge the loop filter capacitors. This resets the acquisition process in preparation for the start of the next burst. The closed loop bandwidth of the OPLL should be designed to be around 1.2 to 1.5 MHz, which should be large enough to allow rapid locking and accurate tracking of the modulation. If the bandwidth is too large, the OPLL will not reject the noise from the modulator sufficiently. The ideal bandwidth will be a compromise dependant on the noise performance of the VCO and amplifier chain.
52
HD155121F
R3 Phase detector C2 C1 R2 C3 VCO
Figure A-1 Loop Filter Circuit of OPLL The following equations provide a good starting point for the design of the OPLL. Let:
f0 = Closed loop unity gain frequency (Hz) (Closed loop bandwidth) fn = f0 / 2 = Closed loop resonant frequency (Hz) n = 2 fn k v = VCO gain (Hz / V) k vr = 2 k v (rad / V sec) k d = Peak phase dotector current = 1.2 (mA) in GSM mod e (at RICURAD = 22 k) k dr = Phase det ector gain = ( 2 k d ) / = 1.7 / (mA / rad) (at RICURAD = 22 k) = DampingFactor 0.9
Then: C2 = k vr k dr / n 2 R 2 = 2 1 /( k v k d C2) = (2 ) /( n C2) C1 = C2 / 15 R3 C3 1 /(10 n ) Note that many VCO modules have up to 100 pF capacitance on the control line. This can be very significant when designing high bandwidth loops. The phase detector peak output current is centered around 1.2 mA which is set by an 22 k resistor RICURAD on pin 12. For example, the f0 = 1.2 MHz loop filter using the VCO of k v = 30 MHz / V (GSM) should be designed in the following method. Let: f0 = 1.2 (MHz) = 1.2 x 10 6 n = 2 fn = 2 6 x 10
5
(Hz) (Hz) ( rad / sec) (Hz / V)
6
fn = f0 / 2 = 600 ( kHz) = 6 x 10 5 k v = 30 (MHz / V) = 30 x 10 6
k dr = 1.7 / ( mA / rad ) = 1.7 x 10 -3 ) / ( A / rad ) (at RICURAD = 22 k) = Damping Factor 0.9
k vr = 2 k v = 2 x 30 x 10 ( rad / V sec) k d = 1.2 ( mA) (at RICURAD = 22 k) )
53
HD155121F
Then:
2 x 30 x 10 6 x 1.7 x 10 -3 = 7.2 x 10 -9 = 7.2 nF (2 x 6 x 10 5 )2 2 x 0.9 R2 = (2 ) / ( n C2) = = 66 2 x 6 x 10 5 x 7.2 x 10 -9 C1 = C2 / 15 = (7.2 x 10 -9 ) / 15 = 480 pF 1 R3 C3 1/(10 n ) = 2 x 6 x 10 6 C2 = k vr k dr / n 2 =
When the VCO modules have 33 pF capacitance on the control line, C3 is 33 pF.
C3 = 33 pF R3 = 804
The result of the calculations for the PLL loop characteristic,based on the following block diagram (figure A-2), is showed in figure A-3 and figure A-4. The offset PLL will be stable if the component values shown are used.
VCO module kdr Input phase Phase + detector - C1 480p kvr/S R3 VCO 804 C2 7.2n R2 66 C3 33p Unit: R : C:F kvr = 2 kv = 2 x 30 x 106 kdr = (1.7 x 10 ) /
-3
Output phase
(rad / Vsec)
(A / rad)
VCO module example GSM: MURATA MQE9P7-897 C3 = 33pF kv = 30MHz/V PCN: MURATA MQE9P7-1747 C3 = 22pF kv = 47MHz/V
Figure A-2 Block Diagram for OPLL Simulation
54
HD155121F
The open loop transfer function, Hol(S), of OPLL as shown in figure A-2 is given below.
Hol(S) = p = = k vr k dr (S + z ) k vr k dr (S + z ) = C1 C3 R3 S 2 (S 2 + 2S p + p 2 ) C1 C3 R3 S 2 (S + p1) (S + p 2 )
C1 + C2 + C3 C1 C2 C3 R2 R3 p { C2 R2 (C1 + C3) + C3 R3 (C1 + C2) } 2 (C1 + C2 + C3)
1 z = C2 R 2 p1 = p ( - 2 - 1) p 2 = p ( + 2 - 1)
Let:
C1 = 480 pF C2 = 7.2 nF C3 = 33 pF (VCO input capci tan ce on the control line) R2 = 66 R3 = 804
Then:
p = 35.70 x 10 6 = 2 x 5.68 (MHz) = 1.036 z = 2.104 x 10 6 = 2 x 335 (kHz) p1 = 27.32 x 10 6 = 2 x 4.348 (MHz) p 2 = 46.65 x 10 6 = 2 x 7.425 (MHz) k vr = 2 x 30 x 10 6 k dr = (1.7 x 10 ) /
-3
(rad / V sec) (A / rad)
The magnitude, | Hol(j) |, and the phase, (j), of Hol(S) are as shown in the following equations. When the above constants from p to kdr are substituted in the equations, then | Hol(j) | and (j) in figure A-3 can be obtained.
Hol( j ) = k vr k dr 2 + p12 C1 C3 R3 2 2 + p12 2 + p 2 2
( j ) = tan -1 ( / z ) - tan -1 ( / p1) - tan -1 ( / p 2 ) - 180 (deg)
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HD155121F
100
designed for 1.2MHz bandwidth loop filter
-80
designed for 1.2MHz bandwidth loop filter
50 | Hol (j) |
GSM
-130
GSM, PCN
0
PCN
(j) 106 107 Frequency (Hz) 108
-180
-50
-230
-100 104
105
-280 104
105
106 107 Frequency (Hz)
108
Figure A-3 The Magnitude, | Hol(j) |, and the Phase, (j), of Open Loop Transfer Function Hol(j)
Moreover, the closed loop transfer function, Hcl(jw) is the following equation, and the magnitude characteristic, Hcl(j), of he closed loop is shown is figure A-4.
Hcl( j ) = Hol( j ) 1 + Hol( j )
20 0 -20 | Hcl (j) | -40 -60 -80 -100 104
designed for 1.2MHz bandwidth loop filter
GSM
PCN
105
106 107 Frequency (Hz)
108
Figure A-4 The Magnitude, | Hcl(j) | of Closed Loop Transfer Function Hcl(j)
56
HD155121F
Cautions
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Copyright (c) Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
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